This invention relates to the field of ion implantation in epitaxial growth and, more particularly, to selective area doping (SAD) in photonic integrated circuits (PICs) and especially to SAD in InP-based PICs.
PICs are formed from monolithic integration of two or more optical or optoelectronic devices on a single substrate. They are the photonic equivalent of microelectronic chips, which integrate two or more transistors on a chip to form an electronic integrated circuit (IC). However, instead of guiding electricity, a PIC routes photons.
In PICs, waveguides that are usually made of silica or polymers, or semiconductors act as the photonic analog of copper circuits, serving as interconnects among various discrete components on a chip. Waveguides are passive devices that provide a conduit for light travel. Examples of other passive devices include couplers, splitters, resonators, and gratings. The PIC usually also includes active devices. Examples of active devices include lasers, modulators, amplifiers, and detectors.
In most conventional PICs, the layers for the passive devices are grown in the same stack as the semiconductors layers for the active devices. As a result, the doped layers required for the active devices are present close to the passive device layers. Doped layers of active devices interact with light and, by absorbing the photons, impair light travel through the overall photonic device. In order to reduce passive device losses, doped layers are formed with lower than optimal doping concentrations and are placed farther away from the active layer of the active devices. Both of these modifications compromise the performance of the device by increasing series resistance.
In short, fabricating active and passive photonic devices within the same PIC, has so far caused a deterioration in overall PIC performance due to doped layers required for the active devices that cause an optic loss in the passive devices as well.
One method of eliminating the interference of doped layers of the active devices with the travel of light through the passive devices is etching the doped layers where only the passive device would be formed and regrowing the layers required for the passive device. This method, however, has processing drawbacks. The etched areas will not be as smooth as the neighboring areas and the subsequent regrowing will not be of a high quality.
Another method of reducing the interference of doped layers with the passage of light through the passive layers is to grow spacers separating these layers from the active layers. However, in conventional PICs, separating the wave guiding core layer from the doped layers increases the thickness of the PIC epitaxial layer stack. Increasing the thickness of the stack does not merely increase the size. Rather, thick stacks have higher defect densities and make it harder to produce high quality material. Thicker stacks also mean higher mesas and less planar PICs. Decrease in planarity makes lithographic printing of fine features needed for couplers, splitters, and gratings very difficult due to poor control of resist thickness and optical focus. Finally, monolithic integration of these PICs with electronic ICs is made difficult if the optical component layers are thick.
A conventional PIC is shown in FIG. 1. The conventional PIC includes an amplifier section 1, such as a semiconductor optical amplifier (SOA), as the active device and a waveguide section 2 as the passive device. The semiconductor layers forming the conventional PIC include a substrate 3, a doped layer 4, a cladding layer 5, a wave guiding core layer 6, a rib layer 8, an active layer 13, a P-type cladding layer 15, and a heavily doped P-type contact layer 17. Additionally, a P-type metal 19 may be patterned over the top of the semiconductor layers in order to provide ohmic contact for the active device. Spacers 7, 9 separate the core layer 6 and the active layer 13 from the rib layer 8. The active layer may be used for either absorption or generation of light. The doped layers or regions may be highly doped regions that provide a low resistance path for the carriers and upon which an ohmic contact may be formed. The P-type cladding layer and the core layer may have a wider band gap than the active layer.
In the conventional PIC, the doped layer 4 unnecessarily extends under the passive device section, which is the waveguide section 2 in the example shown. The mobile charge resulting from doping in the doped layer 4 interacts with the light traveling through the waveguide core layer 6. Absorption of photons by the charge in the doped region causes a loss in the light traveling through the waveguide section 2.
One method to remedy the optical loss resulting from the proximity of the waveguide core layer 6 and the doped layer 4 is using spacers between the two that minimize the interaction of the two layers 6, 4. However, separating the wave guiding core layer 6 from the doped layer 4 still compromises the performance of the active device 1 while increasing the thickness of the PIC epitaxial layer stack.
For example, for a waveguide made from undoped layers with a total stack thickness of less than 1 μm, optical loss is approximately 0.25 db/cm. Introducing a doped layer and a 0.3 μm undoped spacer produces a loss of greater than 10 db/cm. Growing a 1 μm spacer, which more than doubles the stack thickness, decreases the loss to only about 1.5 db/cm, which is not acceptable for most applications. The stack thickness would have to be tripled to bring losses to approximately over 0.5 db/cm. This loss is still more than double the low loss associated with undoped waveguides.
A common method of integrating a passive component and an active component in a PIC starts with a single stack of semiconductor epitaxial layers where some of the active device layers are the layers also necessary for the passive devices. Usually the top doped layers are removed in the areas outside of the active device area. Selective area regrowth may be performed in the passive device areas to deposit cladding material or in the active device areas to deposit top contact material. Using some of the active device layers for the passive devices ensures that the majority of the propagating light field does not have an abrupt interface traveling between the active and passive components. Nevertheless, the bottom doped layer still remains, causing loss in the active components.
In some conventional cases all of the layers of the active device, including both top and bottom doped layers, are removed and the passive device layers are selectively regrown. In such cases, all of the optical field sees an abrupt interface between the active and passive devices. Obtaining a smooth interface is extremely difficult, because the orientation of the vertical face of the etched feature, the availability of reactants (in a chemical vapor deposition case), and smoothness of the face will be different from the rest of the wafer.
In a few conventional cases, the epitaxial stack does not include doped layers, but instead N-type and P-type contact areas are defined on the sides of active devices. Compared with the vertical transport devices, this type of lateral transport active device is inferior due to increased series resistance and decreased electric field strength.
Additionally, SAD implantation through the device layers is not possible for most InP related devices because damage introduced by implantation is addressed by annealing at temperatures that cause heterointerface degradation and dopant movement and in some cases crystal stoichiometry degradation.
Therefore, there is a need for improved methods of preventing or reducing the interference of doped areas of active devices with the passage of light through passive devices on a PIC.